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IPEND bit 4 is globally masking interrupts (Read 3857 times)
Bolo
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Posts: 59
IPEND bit 4 is globally masking interrupts
08/20/09 at 9:23pm
 
While trying to find out why I can't get uart0 interrupts to work, I discovered that the IPEND bit 4 is set all the time, which globally disables interrupts.   I am printing it from a simple myfunc() command '%a' which calls this function:
 
Code:
void dump_interrupt_registers() {
	printf("UART0_IER = %08x \r\n", *pUART0_IER);
	printf("EVT10     = %08x \r\n", *pEVT10);
	printf("IMASK     = %08x \r\n", *pIMASK);
	printf("SIC_IMASK = %08x \r\n", *pSIC_IMASK);
	printf("IPEND     = %08x \r\n", *pIPEND);
	printf("ILAT      = %08x \r\n", *pILAT);
} 


 
Here is the output:
 
Code:
##Version - SRV-1 Blackfin w/picoC 0.91 20:16:14 - Aug 19 2009
myfunc: version 1.41
UART0_IER = 00000000
EVT10     = 00003144
IMASK     = 0000001f
SIC_IMASK = 00000000
IPEND     = 00000012
ILAT      = 00000000

 


 
I get this result after a reset or power-up, before I try to enable uart interrupts, or doing anything else.  
 
Can someone please run this same function and tell me what output they get?  I am wondering if I have a bad BlackFin chip, or if there is something in the stock firmware that could cause this bit to be set.    According to the BF Programmer Reference Manual, this bit should only get set temporarily upon entry or exit from an interrupt service routine, and can only be changed by the Core Event Controller, not the user code.
 
Thanks!
   Bolo

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« Last Edit: 08/21/09 at 7:10pm by Bolo »  

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AndreiSk
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Posts: 168
Re: IPEND bit 4 is globally masking interrupts
Reply #1 - 08/20/09 at 11:34pm
 
UART0_IER = 00000000
EVT10     = 018102c8
IMASK     = 0000001f
SIC_IMASK = 00000000
IPEND     = 00000012
ILAT      = 00000000
ILAT      = 00000000
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Bolo
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Posts: 59
Re: IPEND bit 4 is globally masking interrupts
Reply #2 - 08/21/09 at 10:16am
 
Thanks, Andrei.
 
I checked the manual again and I see that it is correct for bit 4 to be set to 1 upon processor reset.  I just need to find out how it I can clear it.
 
(Correction:  It is supposed to be set to 1 during "reset mode")
 
   Bolo
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« Last Edit: 08/21/09 at 7:12pm by Bolo »  

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AndreiSk
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Re: IPEND bit 4 is globally masking interrupts
Reply #3 - 08/21/09 at 10:28am
 
what is a reason to have interrupt?
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Bolo
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Posts: 59
Re: IPEND bit 4 is globally masking interrupts
Reply #4 - 08/21/09 at 1:48pm
 
Quote from AndreiSk on 08/21/09 at 10:28am:
what is a reason to have interrupt?

 
I hope to speed up the response to motor commands and servo commands when controlling them from a joystick.  Right now, the processor can only respond to them between image updates, which can be a long time at higher image resolutions.    Handling uart input with interrupts should allow processing of commands immediately, without too much of an impact on image updates, as long as the commands only involve updating some registers or sending a few bytes to a external servo controller.
 
My fallback approach would be to just use a separate r/c tx and rx to control motors and servos,  but I want to try a software solution first.  
 
  Bolo
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Bolo
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Posts: 59
Re: IPEND bit 4 is globally masking interrupts
Reply #5 - 08/21/09 at 10:23pm
 
Admin,
  Are there any older versions of the firmware on the SVN archive that pre-date the change from startup.asm to init.c ?
 
I would like to try a version that uses startup.asm, to test a theory I have about the IPEND(4) bit and interrupt processing.
 
Thanks!
    Bolo
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Re: IPEND bit 4 is globally masking interrupts
Reply #6 - 08/22/09 at 7:59am
 
You could look at  
    www.surveyor.com/blackfin/srv-blackfin-050608.zip
 
We switched to the init.c approach in Sept 2008
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Bolo
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Posts: 59
Re: IPEND bit 4 is globally masking interrupts
Reply #7 - 08/22/09 at 5:26pm
 
I got the 050608 firmware version running and dumped IPEND.  It has a value of 0x8000 in that version, so the global interrupt disable bit 4 is not set (hurray!).
 
Apparently the old startup.asm code , in order to get into supervisor mode, causes everything to run under the guise of a low-priority IVG15 interrupt service routine,  which sets bit 15 of IPEND, but leaves bit 4 unset.   This allows all other interrupts to work since they have higher priority.    
 
Init.c apparently leaves IPEND thinking that the processor is stuck in reset mode, and all interrupts are disabled.
 
Worst case, I can use startup.asm and just build a firmware with only the functions I need so that the older single-phase load will work.   Then I can add uart0 interrupt handling as I had planned.  But it would be nice to find a way to make init.c not disable interrupts.
 
   Bolo

 
 
 
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Bolo
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Posts: 59
Re: IPEND bit 4 is globally masking interrupts
Reply #8 - 09/22/09 at 10:22am
 
I believe I have found the solution to using interrupts with the later firmware, preserving its larger memory model and latest added features.
 
I extracted the necessary code from the old startup.asm and created a file called raise15.asm. When called from main(),  it invokes a level 15 interrupt, then re-invokes main().   This results in IPEND being the same value as when startup.asm was used (0x8000) where bit 4 is cleared so interrupts can occur, and I am now able to get uart0 interrupt handling to work.   I have not done thorough testing yet,  but the java console connects and is able to grab camera frames as usual.  I will update this thread if I find any bad side effects from this.
 
(Update:  I did more general testing today with the java console, and exercised interrupt-driven motor and servo command processing.  So far, this fix seems to be solid.)
 
See the code comments for usage instructions.
 
   Bolo

 
Code:
// raise15.asm
//
//  This code should be the first thing called from main if
//   you want to to have interrupts work with the
//   SRV1 firmware.  It raises an IVG15 interrupt, then it
//   reenters main.  This makes the firmware code run
//   within the context of a level 15 interrupt which is the
//   the lowest priority interrupt of the BlackFin.  All other
//   interrupts can interrupt a level 15 interrupt service
//   routine.
//
//   main.c must have:
//   1)  a global defined

//         int raise15called = 0;

//   2)  The very first thing done in main() must be
//       a check of the global with a call to _raise15
//       to make sure it is only called once:
//
//	       if(raise15called == 0){
//		    raise15called = 1;
//		    _raise15();
//          }
//
//   Also,
//   makefile must have raise15.asm added to the list of ASMSRCS
//
//   srv1.x must have raise15.o(.text) added to the list of objects in
//     the .l1code section

.text;

#include <defBF537.h>

#include "config.h"
#include "asmmacros.h"

.global __raise15;

__raise15:
	P0.L = LO(EVT15);    // Point to IVG15 in Event Vector Table
	P0.H = HI(EVT15);

	P1.L = jmp_main;    // Point to start of User code
	P1.H = jmp_main;
	[P0] = P1;          // Place the address of start code in IVG15 of EVT
	r0 = 0x8000(z);     // enable irq 15 only
	sti r0;             // set mask

	raise 15;           // Invoke IVG15 interrupt
	P0.L = wait_here;
	P0.H = wait_here;
	reti = P0;          // RETI loaded with return address
	rti;                // Return from Reset Event

	wait_here :         // Wait here till IVG15 interrupt is serviced
	jump wait_here;

	jmp_main:           // IVG15 interrupt vectored here
	[--sp] = reti;      // pushing RETI allows interrupts to occur inside all main routines

	p0.l = _main;       // get location of main
	p0.h = _main;

	r0.l = end;
	r0.h = end;

	rets = r0;          // return address for main()'s RTS

	jump (p0);		    // jump to main

	end:;
	idle;
	jump end;
__raise15.end:

 

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« Last Edit: 09/22/09 at 7:33pm by Bolo »  

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Chao
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Re: IPEND bit 4 is globally masking interrupts
Reply #9 - 08/03/10 at 7:10pm
 
Bolo,
 
Thanks for sharing. I am trying to use UART0 non-DMA interrupt model to transfer image frame by frame. If I put raise15 in main, how to check the UART0_RBR and UART0_THR? Assume I send a command ('I') to blackfin, then blackfin will send me the picture. Or reversely, how blackfin can accept large data from UART0?
 
I really appreciate your help.
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Bolo
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Posts: 59
Re: IPEND bit 4 is globally masking interrupts
Reply #10 - 08/04/10 at 9:07pm
 
I wrote my interrupt handlers so they would intercept and process my priority commands immediately, but they allow "I" commands and other standard commands to go to to the main.c command loop as usual.  
 
Take a look at this thread, where I posted all my code:
 
http://www.surveyor.com/cgi-bin/yabb2/YaBB.pl?num=1247488102
 
  Bolo
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« Last Edit: 08/04/10 at 9:10pm by Bolo »  

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